Keynote #1 – Ken Rim – Corporate EVP, Samsung Electronics

Scaling CMOS Technology beyond Nanometers


Kern (Ken) Rim currently leads a leading edge logic technology development project at Samsung Electroncis.  Before joining Samsung, he was with the process technology and foundry engineering organization at Qualcomm, where he collaborated with foundries in defining and productizing 10nm and 5nm technologies for mobile SoCs.  He started his career at IBM Research focusing on transistor scaling and novel device structures, and later moved to IBM SRDC to participate in development and productization of multiple generations of CMOS technologies.  He holds a BSE from Princeton and a PhD from Stanford in electrical engineering.

Abstract: CMOS scaling has maintained an astonishing rate of progress over decades, and technologists continue discovering ways to overcome barriers and extend logic technology nodes into the angstrom regime.  Innovations that enable technology scaling have reached beyond MOSFET and metal wire scaling, into the realms of die level integration and system-technology co-optimization.  This presentation will highlight examples of innovations that helped shape the logic technology roadmap in this decade, and will examine questions and challenges each approach faces today, in the hope that doing so will motivate even more innovative solutions by those in the audience.